资源列表
volt_mea_disp
- 本程序是用verilog 编写的模块，用来在lcd1602上显示用tlc549采样的电压值-This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value
lcd_12864_dirive
- HS12864的驱动，verilog语言编写，，，，，希望有用-HS12864 drive, verilog language,,,,, I hope useful
display
- 实现了Verilog语言驱动数码管，扫描稳定。无抖动。可是很清晰的显示字符-Implements the Verilog language-driven digital control
spi_verilog
- 使用verilog编写的spi传输模块，已经通过验证，有仿真文件，可以传输信息。-Prepared using verilog spi transmission module, has been validated with simulation files, you can transfer information.
1602Pkeyscan
- 基于FPGA的lcd1602以及矩阵按键扫描程序（verilog）-FPGA-based lcd1602 and matrix key scanning program (verilog)
filter
- 滤波器，经过modelsim仿真得到了正确的结果-Filter through modelsim simulation get the correct result
shumaguan
- 各种数码管显示源码，七段，八段，共阳共阴都有，且都经过仿真得到正确的波形 -Various digital display source, segment, eight out of a total of yin yang are, and have been to get the correct waveform simulation
dingshi
- 定时器加数码管显示源码，以及test bench测试模块源码，经modelsim仿真结果正确-Timer plus digital display source code, and test bench test module source code, by modelsim simulation results are correct
count
- 各种常用计数器模块，加减可控计数器和模可变计数器等等，经过仿真得到了正确的波形-Various common counter module, subtraction controllable variable modulus counter counter and so on, through simulation to get the correct waveform
duoji
- 基于FPGA的，运用Verilog语言编写的，通过黑线检测来控制舵机的程序。-FPGA-based, using Verilog language, through the detection of black lines to control the steering process.
8051based_on_Verilog
- 8051的内核的verilog实现,有完整源代码，部分注释-8051 core verilog achieve
Structural-UpDown-Counter
- Structural UpDown Counter