资源列表
Example-b8-5
- 每个工程示例都包括了该工程的项目文件、源文件、报告文件和生成结果等文件，读者可以用Quartus II或相应的软件直接打开。设计源文件根据设计输入类型分为源代码或原理图等。-Each project examples include the project files of the project, source files, report files and generate the results files, the reader can use Quartus II or the sof
program
- This is various parts of encryptor part of DES algorithm.
nios-Function
- nios2的函数手册， nios2的函数手册-nios2 function manual, nios2 function manual, nios2 function manual
SpartanIIE_DLL
- 本文详细介绍了SpartanIIE 内部锁相环（DLL）的使用，方便初学者-This paper describes the SpartanIIE internal phase-locked loop (DLL) for use, easy for beginners
fft
- fft in verilog code for fpga
lift_verilog
- 用verilog实现的电梯控制器，代码中有详细的注释说明，是学习rtl设计很好的资料-The elevator controller using verilog implementation, the code has detailed notes, is good datum to learn rtl design
cic_5th_order_pipe1
- system generator 环境中构造cic滤波器模型-cic filter model constructed in the system generator environment
LIP2261CORE_rom
- Verilog ROM Source code
ADF4113_loader
- ADF4113 loader written on Verilog + Icarus Verilog testbench
数据选择器vhd源代码
- 数据选择器，半加器，3-8译码器vhd源代码。是最近学校的实验内容。我要成会员，所以都发上来供大家参考。-data selection, half-adder ,3-8 decoder vhd source code. Recent experimental schools content. I want to become members and therefore has made onto for reference.
1WIRE_NET
- proteus实现led波形的发生及转换-proteus and realize the occurrence led waveform conversion. . . . .
vc
- virtul channel 虚拟通道 用于改善noc的死锁效应-virtul channel virtual channel used to improve the effect of noc Deadlock