资源列表
verilog_pics_lvbo
- verilog图像滤波算法源文件，可供图像处理硬件程序参考-verilog image filtering algorithm source files, available for image processing hardware program reference
zynq-xdma
- zynq xdma source code
USB驱动程序编程
- 基本的usb驱动程序的编程方法,值得一看.-Basic programing method for USB driver, worth reading
VIP_scaler
- FPGA处理图像缩放的工程模块，是在Quartus II里面调用VIP中的Scaler IP核做的-FPGA processing project module, image scaling is done in the Quartus II which calls VIP Scaler IP Core
edge_detect
- 采用VHDL语言编写的边缘检测源代码，在xilinx公司的spatan-3an的仿真版上验证无误，供初学者学习-Edge detection using VHDL language source code, verification, simulation version of the company spatan-3an xilinx for beginners to learn
i2c
- IIC核，可以直接仿真。对于IIC初学者非常有帮助。-IIC core, simulate directly。It s helpful for guys beginning study.
uart_rx.fit
- uart core : uart rx fit
7788
- 用verilog编写的1024点的fft快速傅立叶变换-Written in 1024 by verilog point fast Fourier transform fft
ThreeSimulatedElevator
- 我们的课程设计,三层电梯控制器模拟程序.用verilog HDL语言编写
aes_core_128bits
- 高级加密算法verilog版,包括加密和解密算法，其中有s盒，行移位，列混淆等具体算法。-aes encryption for verilog，include subbyte,shiftrow,mixcol,addroundkey.
Ripple_Counter
- Ripple carry counter with 4 bit resolution implemented in behavioral VHDL. attaches as well is a jpg with the logic gates bock diagram. this is an asinchronous design.