资源列表
low_level_decrypt_8
- This folder consists of five vhdl files. These are low level entities of top level entity named decrypt_8 project. -This folder consists of five vhdl files. These are low level entities of top level entity named decrypt_8 project.
sdram_ov7670_vga
- 基于OV7670摄像头的FPGA采集工程,通过VGA显示输出。-OV7670 camera based on FPGA acquisition projects through VGA display output.
FPGA source files
- this is an introduction to best source code
SPI_slave-SPI-control-ADS8364
- FPGA控制ADS8364采集，采集的数据通过SPI上传，SPI做从机slave。-FPGA control ADS8364 acquisition, upload the data collected through the SPI port, SPI do slave slave.
grey-code--FIFO-IP-core
- 基于格雷码的FIFO的IP核，调试可用于通信接口的队列传输。-Gray code based on FIFO IP core, debugging can be used for communication queue transmission interface.
UART-IP-based-on-queue
- 基于队列传输的UART的IP核程序，已调试可直接使用。-Queue-based transmission of UART IP core procedures have been debugging can be used directly.
HSDI-communcation-interface-IP
- 基于FPGA的HSDI接口的程序，调试可用。-FPGA-based programs HSDI interfaces, debug available.
CAN_VHD.ZIP
- CAN VHDL Controller Area Network en languge VHDL CAN VHDL Opencore
traffic
- traffic light control by FPGA Quartos
Blockramhist
- 提供一个基于block RAM 的直方图统计，使用一个buffer解决了由于流水线产生的读写RAM时间差 主要提供设计思路，控制逻辑和输出可另行设计-block RAM hist
51cpldDesignSource
- fpga+c51的设计源码，精品收藏,整个互联网都没有几个这样的源码推荐下载-fpga+ c51 design source, Collections.The Internet are not recommended several such source code download
EEPROM
- verilog编写的EEPROM读写操作程序 有流水灯显示-EEPROM write verilog written operating procedures have water lights display