资源列表
aurora_bram
- Xilinx SP605评估板 Aurora IP(GTP 简单协议) 核功能验证 调试源代码 chipscope验证通过-Xilinx SP605 Evaluation Kit Aurora IP core functional verification debugging source code and chipscope verified
K7DDR3
- 关于K7板子上ddr3的调试程序，用verilog语言写的-About debugger on K7 board ddr3, with the verilog language written
12345PS2
- ps2键盘接口VHDL程序，经过严格仿真，很有参考价值。-PS2 keyboard interface VHDL program, after a rigorous simulation, of great reference value.
HDB3
- hdb3键盘接口VHDL程序，经过严格仿真，很有参考价值。-HDB3 VHDL keyboard interface program, after a rigorous simulation, of great reference value.
proje2
- it is code for implement the FIFO in VHDL. FIFO is first in first out memory.
proje
- its ALU using VHDL. its parameter have 16 bits and doing logical and arithmetic functions
proje4
- It is 8 bit divisor. it is restoring algorithm implementation.
proje3
- it is ALU using VHDL language. it has inputs with 3 bits.
project5_UART
- It is UART protocol in VHDL. it has two files. one is transmitter and one is receiver.
non--restoring
- it is dividing non restoring algorithm implementation using verilog language.
uartverilog
- 用verilog编写的串口通信程序，真的很不错，推荐给大家一起学习一下。希望能有所帮助。-With verilog prepared by the serial communication program, really good, recommend it to everyone learning together about. Hoping to help.
i2c_master
- I2C master 16 bit addr verlog 代码-verlog i2c master