资源列表
PWM_IP_test
- zynq-7000开发板 PWM IP核（VHDL和Verilog）-zynq-7000 PWM IP
pulseoximiter3
- 通过7段LED来显示心跳。根据血液对光的吸收程度，通过感光器来收集数据，来测试心跳。 TSL235 感光器，放在手指下面，手指上面用光照，从而收集数据。需要配合配件TSL235 感光器，电路板，电阻。是pulseoximiter1文件的拓展版。-This project includes the backend circuit to convert the comparator output to two seven-segment display decimal digits that rep
iic
- verilog实现IIC读写AT24C02-IIC rw AT24C02
binDCT
- 一种快速离散余弦变换硬件实现，对于初学者很有用-A fast discrete cosine transform implementation by using verilog
tb
- fft128_64的testbench文件，用于测试fft的正确性。已验证其正确性，喜欢的就拿走啦-Fft128_64 testbench files, used for testing the correctness of the FFT
vm80a_rev10j
- V80, 8080 microprocessor source code, vhdl, schematic and so on
TX_BaudrateCounter
- 本节包括SpaceWire中的波特率模块的代码，负责提供6.4us和12.8us的定时作用-the code of botel in spacewire
chengfaqi
- 数字电路中实现八位二进制乘法器的VHDL代码-Digital Circuit achieves eight binary multiplier VHCDL code
DTGD16x16
- FPGA控制点阵LED16x16显示多个汉字，包括原理图设计以及详细的源程序设计，内容较为详细。-FPGA control LED16x16 dot matrix display multiple characters, including schematic design and detailed design of the source code, more detailed content.
chengfaqi
- 16位的原码两位乘法器，实现原码两位乘，经试验可以使用-16 of the original code two multiplier, two implementation source code
traffic_ligt_controller_veeren
- traffic light controller
IJARCET-VOL-1-ISSUE-traffic_light
- Good document which contains traffic light controller