资源列表
dianyuan
- 实现按键控制AD三通道的电源转换的功能。-AD three buttons control channel to achieve power conversion
TLC1620
- 基于FPGA的Verilog语言实现的六十进制计数器-FPGA-based Verilog language implementation of six decimal counter
tx_module
- 串口通信，实现开发板与计算机之间的数据传输-A serial port communication, realizing the development board and the transfer of data between computers
vga_driver
- 基于EP3C16的VGA显示驱动工程。时钟40M，图片存储在FPGA内部的ROM中，VGA显示器分辨力为800*600*60Hz，存储图片需要800*600点（bit），由于EP3C16的ROM不够大，ROM中存储内容为8bit*30000；显示器内容为上下半屏分别显示ROM中的内容，显示图片相同。ROM中的内容由地址线的变化来控制。-Display driver works based EP3C16 of VGA. Clock 40M, pictures stored in the ROM o
IDEA
- IDEA算法硬件实现，可以在ise系统上实现-IDEA algorithm implementation
hpi
- 用CPLD实现4个C6201通过HPI接口互连的逻辑设计，包含VHDL程序-4 of C6201s through the HPI interface logic design of interconnection with CPLD, including the VHDL program
shuzizhong
- 基于VHDL语言的数字钟，有元件例化，修改时钟功能 Quartus II平台-VHDL language based digital clock, there are component instantiation, modify clock function Quartus II platform
SinGen
- 使用Verilog编写的正弦波生成工程，使用ROM核产生，利用mif文件-Written using Verilog sine wave generation projects using ROM nuclear generation, use mif file
pingpang
- spartran_3A乒乓球gameboy的设计与开发-a Table tennis game in spartran_3A
musicplay_v
- FPGA下实现的音乐播放程序,实现播放一段小音频-a music play program in FPGA
Basys2_100_250General
- Spartan 3e basys2管脚控制文件-Spartan 3e basys2 Pin control file
spi_slave
- SPI功能模型，可以用于SPI的仿真验证工作，对其进行测试-Now for the SPI slave in the FPGA. Since the SPI bus is typically much slower than the FPGA operating clock speed, we choose to over-sample the SPI bus using the FPGA clock. That makes the slave code slightly more compli