资源列表
24bit-dadda-multiplier
- IT IS HIGHBRID MULTIPLIER WHERE WILL BE USEFUL TO GET HIGH SPEED MULTIPLICATION IN PROCESSORS
reversible-squarer
- it is hybrid squarer circuit which will be designed using reversible gates which having les hardware complexity with compared to the conventional gates
ddfs
- IT IS THE CIRCUIT WHICH EXACTLY WORK AS SINE WAVE GENERATOR, THIS CAN BE EFFICIENTLY USED IN THE COMMUNICATIONS SYSTEMS
4-2-compressor
- IT IS THE HYBRID COMPRESSOR WHICH WILL BE USEFUL LOW POWER SINCE THE GATE COUNT AND DELAY REQUIRED IS VERY LESS COMPARED TO THE NORMAL DESIGN
vid_clkgen
- Xilinx xapp sink displayport vid clk geneator source
submicron-technology
- IT IS THE TECHNOLOGY TO REDUCE THE SHORT CIRCUIT LEKAGE POWER IN CMOS TECHNOLOGY. BY THIS WE CAN AVOID THE SHORT CIRCUIT POWER
image-rotation
- 基于FPGA的system generator的图像旋转处理，利用system generator的图像旋转处理程序。本程序是基于system generator下的matlab运行。-FPGA-based image processing system generator rotation, the use of image rotation system generator handler. This procedure is based on matlab run under the sy
SRC
- 流水线CPU的verilog实现，包含id，if，ex，mem等部分的源码-an implementation of Pipelined CPU in verilog
scan_led
- 每个时钟，计数时间，实现8的扫描显示，在数码管上依次显示13579bdf，可以选择EDA实验箱，FPGA EP1C6Q240C8。-Each clock, counting time, achieve 8 scan display, turn on the digital tube display 13579BDF, can choose EDA experimental box, FPGA EP1C6Q240C8.
MB
- 基于VHDL语言数字秒表设计,在FPGA实验平台下开发-Digital stopwatch design based on VHDL, FPGA experimental platform under development
r7lite
- R7Lite是基于Xilinx的Kintex7系列FPGA的PCI Express参考设计代码，PCIe 2.0 4x模式，包括了FPGA实现，Linux下驱动和测试例程。-R7Lite is a PCIe Reference design based on Xilinx Kintex7 FPGA,including FPGA code ,Linux Driver and Testing App
m_serial
- m序列产生。3个300阶m序列级联，产生近似随机的数数。输出包括串行输出的随机时钟和并行输出的32位的随机数。-m sequence generation. 3 300 m-order sequence cascade, resulting in an approximate number of random numbers. Output 32 of the random numbers and the parallel clock output comprises serial output