资源列表
FP_ADDER
- This a project of FP_ADDER.-This is a project of FP_ADDER.
FP_ADDER_SUBTRACTOR
- This is FP_ADDER_SUBTRACTOR.
Ex02_BCD
- 用FPGA实现BCD功能，提供源代码，并配有文字说明。适合初学者看，语言为VHDL语言。-Realizing the ability of BCD with FPGA.Use VHDL.There are also exploin in Chinese,which is suitable to the freshman.
fullAdder_4bit
- This is fullAdder_4bit with testbench.
counter-with-T_FF
- This is counter with T_FF.
decoder
- This decoder by VHDL.-This is decoder by VHDL.
VerilogExperiment_v2
- verilog那些事儿_时序篇程序,请需要的人员下载参考-verilog timing of those things _ Chapter program, please download the reference staff needed
FPGATimeQuestAnasiseREV7.0
- FPGA那些事儿 TimeQuest静态时序分析REV7.0，需要的人员可以下载参考-FPGA those things TimeQuest static timing analysis REV7.0, needed can download the reference
Chapter_4
- E4_4_FilterCompare,FPGA实现的滤波器书的配套程序-E4_4_FilterCompare, FPGA realize filter book supporting program
Chapter_6
- FilterCompare,FPGA实现的滤波器书的配套程序-FilterCompare, FPGA realize filter book supporting program
Chapter_3
- FilterCompare,FPGA实现的滤波器书的配套程序-Filter Compare, FPGA realize filter book supporting program
Chapter_9
- E9_1_DPSKSignalProduc,FPGA实现的滤波器书的配套程序-E9_1_DPSKSignalProduc, FPGA realize filter book supporting program