资源列表
LZ77_1
- Package include hardware implementation of Lz77 algorithm
Power_Supply_Monitor
- This module implements the logic for monitoring power supply inputs
Serial_LED_Interface
- This module implements the logic for controlling port LED based on link status received switch-This module implements the logic for controlling port LED based on link status received switch
SMI_Interface
- Serial Management Interface implements the logic for communicating with External PHYs. used to write control registers of PHYs.
SPI_Interface
- This module implements Serial Pheripheral Interface(SPI) Slave logic. It Communicates with MCU(Master).SPI Mode CPOL = 0 CPHA = 0 Serial Clock frequency MCU is 1 MHz. For SPI Mode CPOL = 0 CPHA = 0 -This module implements Serial Pheripheral Inte
verilog_led7
- Verilog HDL 数码管控制程序,保护整个工程文件-Verilog HDL control
LCD12864
- LCD12864，包含Verilog和VHDL源码-LCD12864 control
digital--clock
- 在Quartus II 平台下用verilog语言写的多功能数字钟-In the Quartus II platform with verilog language written multifunction digital clock
RESULT-adder
- adder unit which contains basic PPT and the coding
exp11
- 在掌握可控脉冲发生器的基础上了解正负脉宽数控调制信号发生的原理。熟练的运用示波器观察实验箱上的探测点波形。掌握时序电路设计的基本思想。-On the basis of mastering the controllable pulse generator, the principle of the digital modulation signal of the positive and negative pulse width is understood. Skilled use of osci
Mux
- Multiplexer on verilog
DigitalCompinacijaSimulacija
- It is a bridge between CPU and sensors where user can not connect sensors directly on CPU. It consumes very small number od LUTs and it is suitable for CPLD design. it works on following way, when logic detects falling edge of RX, then this action tr