资源列表
LCD1602_V0.2
- fpga的一个lcd程序,程序很好，希望各位给个赞-A LCD procedures of fpga
saopin
- 扫频输出信号源，扫频范围可修改，verilog语言。-Sweep frequency output signal source, sweep frequency range can be modified, Verilog language.
am-wave
- AM波的vhdl方法实现，quartusii上亲测。图形法-AM wave VHDL method to achieve, QuartusII on the pro test. Graphic method
fasongjieshou
- fpga上发送模块和接收模块的设计与实现。不同的波特率-Design and implementation of the sending module and receiving module on fpga. Different baud rate
16fenpin
- verilog语言所编程的16分频程序，可按需要修改。-Verilog language of the 16 frequency of the program can be modified.
SR_DDS
- DDS信号源设计，有正弦波，方波，三角波，AM波，FM波，还有PSK,FSK,16QAM等多种信号产生。-DDS signal source design, there are sine, square wave, triangle wave, AM wave, FM wave, as well as PSK, FSK, 16QAM and other signal generation.
usb_device_core_latest.tar
- usb设备控制器ip核，controller设备端ip核-usb device ip core
BreathingLight
- 这是在Quartus平台上用verilog语言编写的程序，其功能是实现一个呼吸灯-This is the platform used in the Quartus verilog language program, its function is to achieve a breathing light
fir_ex
- 设计一个 14 阶 FIR 滤波器，已经给出了滤波器系数以及验证程序，选用Altera 的 EP2S60F484C3 器件-Design of a 14-order FIR filter, the filter coefficients have been given and the verification process, the choice of Altera s devices EP2S60F484C3
TX_RX
- FPGA用verilog实现串口和电脑的字符串以及单字符精准无误通信，即通过电脑向FPGA发送任一长度数据，FPGA返回PC相同的数据。波特率为9600，本例程为了得到精准的波特率使用了50M时钟的3倍频，测试可用，如有不明的地方，可以给我留言-FPGA implementation using verilog string and the computer serial port and single-character accurate communication, 9600, FPGA u
veriloghdl-Prog-of-IR
- 采用verilogHDL语言编程，对4x4键盘进行编码并且调制成红外遥控信号，适用于可编程逻辑器件的红外遥控解码逻辑设计。-Use verilogHDL language programming, to 4 x4 keyboard encode and made the infrared remote control signal, is suitable for programmable logic devices of infrared remote control decoding log
wallace14
- this is wallace multiplier 14 bit in vhdl code