资源列表
ClockGenerator
- Verilog code for a programmable clock generator
Comparator
- Verilog program for an 8bit up down counter
Counter
- Verilog program for a counter
DFlipflop
- Verilog Program for a d flipflop
HDMI_test
- 基于Xilinx的FPGA的spartan3的HDMI测试功能刷屏显示。-Based on Xilinx s FPGA spartan 3e of the HDMI display refresh function tests.
Least_Squares
- 基于FPGA两种基于非线性最小二乘法的电力系统频率跟踪方法，搜索算法和Levenberg-Marquardt算法。- least square method FPGA
USB_send_recive
- 完全用verliog写的FPGA和CH372与电脑USB设备通信。可以和电脑收发数据，已经测试成功，如有疑问留言，程序可能有点乱，-Written entirely in verilog FPGA and CH372 USB devices to communicate with the computer. And computers can send and receive data, it has been tested successfully, if in doubt leave a m
New-folder
- different method to implement decoder and on for detectorn
vhdl-convert-verilog
- vhdl与verilog相互转换的工具，在xp条件下可以破解成功，win7下只能用demo模式-vhdl and verilog conversion tools in xp successful break conditions, can only be used under win7 demo mode
iic_verilog_ACK
- IIC_Verilog。考虑到了ACK(应答信号)，AT24C02（EEPROM）与EPM240的IIC通信，字节写选择读。在特权老师的基础上改的。经过这次更改后，对IIC时序有了很深刻热认识！ 代码自己验证过！-IIC Verilog AT24C02 with EPN240
wenjian
- 异步串口通信uart Verilog语言编写-Asynchronous serial communication uart Verilog language
spi_pdf
- FPGA spi通讯，包含test文件和master文件-FPGA spi communication, including the test document