资源列表
deccount3
- 本程序是利用VHDL语言实现3分频器的设计-The program is 3 divider using VHDL language design
PS2-controller
- 基本AMBA APB总线的PS/2接口控制器，可以实现对PS/2键盘和鼠标的控制。-A PS/2 controller based on AMBA APB protocal,which can control the PS/2 keyboard and mouse.
MULTI8X8
- 乘法器的硬件快速实现，采用Vhdl语言，对于学习芯片开发的人有用。-multiply is completed by vhdl.
park
- 该程序是用VHDL制作的停车场停车位显示系统的源码-The program is produced with VHDL display system of parking spaces with source code
FPGA_Audio_Player
- Altera FPGA SD卡播放音乐程序，基于Nios，强力推荐！-Altera FPGA SD card music program, based on the Nios, highly recommended!
clk_sync
- 本文件是在ALTERA公司的QUARTUS下VHDL+原理图编写的时钟同步逻辑-This document is in the company' s QUARTUS ALTERA under VHDL+ schematic written clock synchronization logic
Hamming_Decoder
- (7,4)Hammming码解码器，verilog代码实现。监督矩阵为HT=[1,0,0 0,1,0 0,0,1 1,0,1 1,1,1 1,1,0 0,1,1]-(7,4) Hammming code decoder, verilog code. Monitoring matrix HT = [1,0,0 0,1,0 0,0,1 1,0,1 1,1,1 1,1,0 0,1,1]
UART
- verilog代码，串口发送接收代码，含有源代码和测试文件，准确可用-verilog code for serial port transmit and receive code, with source code and test files, and accurate available
digital_7
- Verilog七段数码管显示控制程序，已经在实验板上测试通过。-Verilog seven-segment LED display control program, the board has been tested in the experiment.
FPGA-and-DS18B20
- FPGA与测温芯片DS18B20的通信实现，用verilog语言编写。有实际验证过的工程，有实验报告，有DS18B20的资料，适合快速了解。-FPGA chip with the DS18B20 temperature achieved with verilog language. Verified with the actual project, there are experimental reports, the DS18B20 data for quick understanding.
ram_fifo_ram
- 程序实现了在FPGA内部开辟RAM+FIFO+RAM的IP核进行数据之间的调试。方便需要用到的童鞋进行参考。已通过modelsim调试-Implemented within the FPGA program to open up RAM+ FIFO+ RAM for data between the IP core debugging. Need to use the shoes for easy reference. Has passed debug modelsim
traffic_light
- 模式可调交通灯。利用拨码开关，实现正常工作模式、test模式、紧急模式的切换。-Mode adjustable traffic lights. Using DIP switches, to achieve normal operating mode, test mode, emergency mode switch.