资源列表
msk_mod
- msk 调制解调源码，每符号采样8次。对pn码进行调制后，进行解调，解调过程含：符号差分，中值滤波等过程。-msk modem source code, sample 8 times per symbol. Modulation of the pn code after the demodulation, the demodulation process including: symbol differential, the value of the filtering process.
Modelsim-complie-xilinxlibrary
- Modelsim编译xilinx库的方法详细介绍。-Modelsim compile the xilinx library methods in detail.
Test
- verilog语言编写的分频程序及其testbench测试文件。fpga开发入门的好例子。-verilog divide written test procedures and testbench files. fpga development of entry-a good example.
cpld_10fenpin
- 针对cpld芯片采用verilog编程实现的10分频程序。附带其功能仿真文件。-For cpld chip verilog programming of 10 frequency program. With its functional simulation file.
100example-of-vhdl
- vhdl语言详细的例子，很好用。希望大家可以喜欢。基本上都可以找到你要的东东。-vhdl language detailed examples, easy to use. Hope you can like it. Basically, you can find the stuff.
clock
- VHDL编程--数字钟 非常适合初学者-VHDL Programming- digital clock is ideal for beginners
MIPS
- 用VHDL设计单周期的MIPS处理器,实现简单的指令-VHDL design with single-cycle MIPS processor, simple instructions
fft1604
- msp430程序开发FFT代码！对板子上所有的模块开发适合应用-msp430 program development code! On board the module development suitable for all! !
430FF123
- msp430169实现FFT代码！07全国电子设计大赛程序代码！-msp430169 achieve FFT code! 07 code national electronic design contest!
IR
- 利用verilog编写的红外线接收解码电路，开发环境为altera板，quartusII仿真并在开发板上验证通过-Prepared using verilog infrared receiver decoder circuit, the development environment for the altera board, quartusII simulation and validated by the development board
SubspGA
- 子空间分解在FPGA上的高效实现Subspace decomposition in the efficient implementation on FPGA-Subspace decomposition in the efficient implementation on FPGA
ptive
- 虚拟仪器与FPGA的快速高精度自适应测频设计-Virtual Instrument and fast FPGA Design High Frequency Adaptive