资源列表
modelsim
- ModelSim使用教程-ModelSim Tutorial
Nction-
- VHDL新型便携式电缆检测装置研究New Portable Detection -VHDL New Portable Detection Device Cable
DCtroller
- FPGA分组式直流固态功率控制器的设计DC FPGA block design of solid-state power controller-DC FPGA block design of solid-state power controller
lock
- 用于模仿密码锁的工作过程。完成密码锁的核心控制功能。才用VHDL作为编译平台-Used to simulate the working process of lock. Completion of the core lock control function. VHDL was used as a compiler platform
POC_all
- poc即为cpu与外部设备，比如打印机的接口，用VHDL的编程来实现poc功能的仿真-poc is the cpu with an external device, such as the printer' s interface, programming with VHDL simulation capabilities to achieve poc
hdldaywok
- 机器状态机的控制工作方式。用vhdl写的。很不错哦源代码。-Control of the machine state machine work. Written with vhdl. Oh, very good source.
2011-03-09
- 基于quartus II cycloneII verilog分频器-Divider based on quartus II cycloneII verilog
1
- 基于Nios_II_的自定制PWM模块设计与实现-PWM based Nios_II_ of customized module design and implementation
Verilog-HDLTOP-DOWN
- 用Verilog HDL的建模来设计一个经简化的只有八条指令、字长为一字节的RISC中央处理单元（CPU）的顶层设计。-Modeling with the Verilog HDL to design a simplified and only eight instructions, word length is a byte RISC central processing unit (CPU) of the top-level design.
controlvhdl
- 一个四位微程序控制器的指令译码器源码，运用VHDL语言实现。-A four micro-program controller instruction decoder source code, the use of VHDL language.
shukuliu
- 开发环境,用VHDL语言开发，实现了数据流的编码与实现-Development environment, language development using VHDL, implements the encoding and implementation of data flow
aes_core.tar
- 基于FPGA平台的256为AES加密IP核-FPGA-based platform for the AES encryption IP core 256