资源列表
FPGA
- 基于FPGA的高速图像采集／处理卡 主要内容为高性能FPGA作为核心的高速图像采集处理卡的应用-FPGA-based high-speed image acquisition/processing card mainly for high performance FPGA as the core of the high-speed image acquisition and processing card applications
vga256
- 利用verilog编写的可以在vga上动态显示256种颜色，自己的DIY之作。-You can use verilog prepared dynamic display 256 colors on vga, make your own DIY' s.
22391187TrackMe
- earth java 3d homework-earth java 3d text
shuzizhong
- 1.计时功能采用24小时方式，显示小时、分钟、秒。 2.采用双键校时法，MODE和SET，前者选择始终模式（包括小时、分、秒校时），后者校时脉冲。 3.结果用6个共阳数码管显示。-1. Time functions the way the 24-hour, show hours, minutes, seconds. 2. The use of double bond at the Law School, MODE and SET, always choose the former mod
count10
- 基于vhdl语言的10进制的计数器程序，应该有用-Vhdl-based language program for 10 binary counter
m_xulie
- 这是用verilogHDL写的m序列发生器，简单易用，代码非常易读-It is written verilogHDL m sequence generator, easy to use, the code is very easy to read
quanjia
- 通过VHDL语言编写的一位全加器程序，该程序是经过元件例化的方式实现-VHDL language through a full adder program, which is the result of component instantiation way to achieve
LED_Shine
- 基于EP2C8Q208C8N的LED 闪烁程序，对于入门FPGA有帮助-Based EP2C8Q208C8N the LED flashes procedures for entry FPGA helpful
FPGA_sent_UART
- 简单串口接收，发送程序,能实现收发，可以测试通过-Simple serial port to receive, transmit program that can send and receive, you can test by
add_led
- 利用K1,K2来代替A2 A1 的数据输入。 利用K3,K4来代替B2 B1 的数据输入。 我把A0和B0都设置成1了。 所以一开始数码管显示的是E.应为111加111就等于E 数码管显示相加结果-K1, K2 to replace A2 A1 data input. K3, K4 to replace B2 B1 data input. A0 and B0 are set to 1. So beginning digital display E. should be 111 p
FPGA
- 实现温度显示，接温度传感器。在4数码管上显示小数点后两位的温度-temperture of FPGA
verilog
- 数字信号处理的FPGA实现 第三版 verliog 从简单的加法器 到 现代滤波器-FPGA implementation of digital signal processing third edition verliog from simple adder to modern filter