资源列表
mulacc
- vhdl code for multiplication and accumulation
mux2to1
- 二选一电路，实现最基本的电路信号输出选择，抢答器等判断电路的基础电路-Alternative circuits, realize the basic circuit signal output devices such as choice, vies to answer first based circuit judge circuit
SRAM_Controller
- Altera University Program的Avalon总线IP核，SRAM控制代码，可以解压后直接挂载在Avalon总线上 -Altera University Program of the Avalon bus IP core, SRAM control code can be directly mounted after decompression in the Avalon bus
SIREN
- An Alarm Project Writen in VHDL for FPGA Devices
Verilog
- 用verilog实现七位最大公约数的算法，使用状态机，可仿真电路图-Seven with the greatest common divisor algorithm verilog implementation, the use of state machine circuit simulation
vhdl_clock
- VHDL实现数字时钟，利用数码管和CPLD 设计的计数器实现一个数字时钟，可以显示小时，分钟，秒。程序主要要靠考虑十进制和六十进制计数器的编写。 以上实验的程序都在源代码中有详细的注释-VHDL digital clock, the use of digital control and CPLD design to achieve a number of counter clock, show hours, minutes and seconds. The procedure depends
ad7991
- ad7991驱动程序 适合于ad79XX系列芯片驱动-ad7991 driver suitable for ad79XX series chip driver
clocksem
- 电子表，实现计时记分计秒的功能，同时可以对时分秒进行校正，实现调时功能。-Electronic watches, time points of dollars to achieve a second function, at the same time when the minutes and seconds can be calibrated to achieve when the transfer function.
VHDLauto.rar
- 自己变得自动售邮票机vhdl程序，仿真已通过，适合初学者参考。,Become their own stamp vending machine VHDL procedures, simulation has passed for beginners reference.
qiduanshumaguan
- 利用FPGA实现七段数码管，实现交替闪亮-Using FPGA digital control of Seven and achieving alternating flashing
3
- 电子数字钟设计实际上是一个对标准频率（1Hz）进行计数的计数电路。振荡器产生的时钟信号经过分频器形成秒脉冲信号，秒脉冲信号输入计数器进行计数，并把累计结果以“时”、“分”、“秒”的数字显示出来。-Electronic digital clock is actually a standard frequency (1Hz) to count the counting circuit. Oscillator clock signal through the divider formed second
shuzishizhong
- 用VHDL实现的数字时钟，源代码以调通，能够直接使用！-VHDL implementation of serial communication with the source code to adjust pass, can be used directly!