资源列表
count100
- 一个用VHDL语言编写的一百进制计数器。软件平台是Quartus II 7.2 ，由前面设计的小模块组合起来制作的，适合初学者，通过这些程序，刚接触VHDL的学习者可以一步步的去认识和了解VHDL，最后通过设计一个具有实用功能的电路，来增加学习者的成就感和学习兴趣。所有程序软硬件调试都成功通过，硬件平台是自己学校设计的一块开发板，要了解的可以联系本人。联系QQ：782649157 -Written in VHDL language using a binary counter 100. The
labview波形发生和数据采集程序包含了很多子VI
- labview波形发生和数据采集程序包含了很多子VI，可以帮助大家学习-labview waveform generation and data acquisition program contains a number of sub-VI, can help you learn
try2
- vhdl与原理图混合的方式进行设计 vhdl语言描述底层模块，再用原理图设计的方法设计顶层原理图文件-vhdl mixed approach with the schematic design vhdl language to describe the bottom of the module, and then designed the schematic design of the top-level schematic file
VGA
- VGA彩条信号发生器，使用Verilog编写-VGA color bar generator, written using the Verilog
blocking_nonblocking
- 讲述阻塞与非阻塞赋值的资料，很不错的资料，其实vhdl和verilog差别不打的
lab-1.2
- this is lab2 from altera
shuzizhong
- 使用vhdl语言设计电子钟。具有时、分、秒计数功能，且以24小时循环计时。计时结果要用6个数码管分别显示时、分、秒的十位和个位。具有清零功能。 -Use vhdl languages designed electronic clock. Has hours, minutes, seconds count and a 24-hour cycle timing. The timing results use six digital tube display hours
AND
- descripcion the compuerta and in vhdl, easy for students
test_bench
- Test benching in VHDL
sp6ex2
- PWM蜂鸣器驱动实例，产生频率为25Hz，占空比为50 的蜂鸣器发声信号；同时详细介绍USB下载线的连接与驱动安装，进行板级的代码在线调试和固化-PWM buzzer driver instance, the frequency of 25Hz, duty cycle of 50 of the buzzer sound signal at the same time the USB download line connection and driver installation, the b
NI-Tutorial-3536
- info about daq first steps
mclock
- 电子时钟设计 包含校时和闹钟功能 闹钟播放一段音乐 ppt和word报告也有 太大不上传 需要的发邮箱lin170587788@gmail.com-Electronic clock and alarm functions including school play a musical alarm clock ppt and word report also does not upload much needed hair mailbox lin170587788@gmail.com