资源列表
FFT_designed_in_FPGA
- 在FPGA中实现FFT的8篇很好的文章，很有启发-FFT in the FPGA to achieve the eight very good article, very enlightening! ! !
MyUART
- 经过我严格测试，已经获得实际应用的RS232串口通讯的VHDL编写的程序，对于初学者绝对有帮助！-After I tested, has received the application of the RS232 serial communication program written in VHDL, for absolute beginners help!
model_adder
- 包括一个基于Quartusii的加法器工程，以及基于ModelSim的前仿真、综合后功能仿真和布局布线后时序仿真的完整例程及testbench文件，吐血推荐，非常有用！-Includes an adder based Quartusii works, and the first based on ModelSim simulation, synthesis functional simulation and post layout timing simulation after complete
k
- code VHDL for control VGA on spartan 3e
h_bsp
- ep2c8q208上跑nios，外部使用静态sram，速度超级快！-ep2c8q208 run on nios, external static sram, speed super fast!
s_bsp
- ep2c8上跑起来的nios，外部静态sram存储器，简单测试代码-ep2c8 on the run up nios, external static sram memory, a simple test code
s
- nios的hello world代码，重要的是泡在了sram上，作为存储器-nios in the hello world code, it is important to soak in the sram, as a memory
h
- nios的hello world代码，重要的是泡在了sram上，作为存储器-nios in the hello world code, it is important to soak in the sram, as a memory
hangci
- verilog写得频率记，专门测频率，在cpld上运行，epm240t1-verilog frequency note written specifically measured frequencies cpld run, epm240t100
hellosmall
- 小型的hello程序，不用标准c语言库，用的是底层串口驱动nios-Hello small program, not the standard c language library, using a low-level serial driver nios
hellosmall_bsp
- helloucos的bsp文件，平台泡在nios上很好，扳机支持源码-helloucos the bsp file, the platform on the bubble in the nios a good trigger to support source
signal
- verilog写得一个信号源，很爽的，输出667hz信号超级准-verilog write a signal source, so cool, and the output signal is super-quasi-667hz