- Binary_search This section allows you to browse the files contained within a ZIP file without having to download it first. The file list below shows all of the files those that are in a text format that we recognize the extension for (e.g. source code files) are linked to a page where you can view the contents of the file.
- qq-tips 实现类似qq信息提示框 不错的哦~ 搞界面的朋友下来
- PINGCHA 提取平差文件中的数据
- m_omhorz 无线通信课程设计的matlab程序
- mingw-get-setup MinGW(Minimalist GNU For Windows)是个精简的Windows平台C/C++
资源列表
diti
- 8.19 电梯控制器程序设计与仿真2010/05/04-8.19 Elevator Control Program Design and Simulation 2010/05/04
8.21VHDL
- 8.21 自动售货机VHDL程序与仿真2010/05/04-8.21 vending machine and simulation of VHDL procedures
VHDL-Beginners-Book
- VHDL beginner book by Karen Parnell & Nick Mehta, for beginners who are new to FPGA programming by VHDL
cronometru
- crono made on fpga on vhdl code ,
DE2_70_CAMERA_V1.0.3
- terasic 5mp camera also quartus 9.1 support
synplify_makefile
- synplify、ise和verdi在linux上的makefile；多个工具集成在一个文件管理，方便快捷，值得参考-the makefile for synplify, ise and verdi on Linux multiple tools integrated into a document management, convenient and valuable reference! ! !
Verilog_examples
- 强大丰富的Verilog实例资料，内含大量简单实用的Verilog源代码，带你快速入门！-Verilog examples of powerful data-rich, containing a large number of simple and practical Verilog source code with you a quick start!
the_common_module_in_EDA
- EDA实验中用到的常用模块程序，内容丰富，下载绝不后悔！-EDA experimental procedures used in common module, content rich, download no regret!
verilog_program
- 各种初学Verilog者需要练习的实例代码集锦，包含加法器，BCD计数器，2分频，交通灯等等！-Beginners need to practice a variety of examples of Verilog code highlights, including the adder, BCD counters, 2 frequency, traffic lights and more!
paper_FPGA
- 基于FPGA控制的高速固态存储器设计，对固态存储器进行了需求分析, 根据航天工程对高速固态存储器的需求, 确定了设计方案。 针对航天工程对高速固态存储器速率要求较高的特点, 在逻辑设计方面采用流水线技术、并行总线技术。在器件选择方面, 采用LVDS构成接口电路, FPGA构成控制逻辑电路电路, SDRAM芯片阵列构成存储电路。设计了高速固态存储器。该设计简化了硬件电路, 大大提高了存储数据的速率。-FPGA-based control design of high speed solid s
VHDL_ip
- 基于VHDL语言的可移植通用存储器IP核的实现，本文介绍了一种利用VHDL 硬件描述语言实现可移植通用存储器IP 核的思路与方法，实验研究表明，该方法具有可移植性强、扩展性及灵活性好的特点，有效地改善了数字系统设计的效率。-VHDL language based on universal portable memory IP core implementation, this paper presents a VHDL hardware descr iption language using a
VerilogXiaYuwenExample
- Verilog数字系统设计教程（夏宇闻著） 例题源程序-Verilog Digital System Design Tutorial (Xia Yu smell) Example source code