资源列表
12334
- verilog HDL reference
an294_16x16
- Verilog编写的16x16的可交叉的CPLD程序,可用在16个VGA入,16个VGA输出-16x16 cross switch CPLD software wrote by verilog which can be used in 16 VGA input , 16 VGA output application
eeprm
- verilog编写的EEPROM代码,包括我们最常用的AT24C02/24C04/24C08/24C16-eeprm is a verilog HDL behavioral model for AT24C02/4/8/16
Behaviour
- 这是一个使用VHDL编写的8051的CPLD行为代码,-there are several modules for 8051 MCU wrote by VHDL
utopia
- utopia，system verilog写的CPU测试平台代码-utopia, system verilog code written in CPU test platform
verilog_basics
- Very nice introduction to Verilog by Teemu Pitkä nen
music_caichawuqu
- 用FPGA驱动蜂鸣器，唱茉莉花这首歌。里面有三个8度音的数据。-FPGA-driven with the buzzer, to sing this song Jasmine. Inside there are three 8-degree sound information.
KX_7C5TP
- 康芯公司的KX_7C5TP实验板原理图。这个实验板很好用。希望这个原理图能给FPGA的初学者有所帮助。-Kang core company KX_7C5TP experiment board schematics. This experiment very well with the board. Hope that this will give FPGA schematic beginner help.
yuanlitu
- 这是康芯公司的GW48EDA_PKx实验系统的原理图。这试验箱功能很强大。希望给FPGA的初学者有所帮助。-This is the core company' s GW48EDA_PKx Kang experimental system schematic. This feature is very powerful chamber. FPGA beginner want to give help.
testRom
- 四子棋,最先下连续4个子赢。reset才能重新开始没有和棋-4 in a row
Queuing
- 一种高效的排序VHDL程序，本程序节省资源，最高效的发挥FPGA的时序能力。-a kind of Queuing VHDL Program