资源列表
tb_tx_modem
- test bench for tx modem to make simulation for ofdm based system
clockreverse
- 数字钟 能实现倒计时 小时和分钟的调整 复位和暂停倒计时-clock
CORDIC_GeneralInfo
- CORDIC implementation
HEX_DISPLAY
- Simple vhdl descr iption to show numbers on 7-segment s on Altera DE2 board.
Eng
- HDL Design, verification using HDL languidges
register
- this a project that makes a shift register using VHDL and the Xilinx platform. -this is a project that makes a shift register using VHDL and the Xilinx platform.
add
- is a project that achieves a Full Add with VHDL on the platform XILINX
vhdl
- vhdl book for design
vhdl1
- about architecture of entity about vhdl design
vhdl2
- vhdl book to design
project_Giovanni_DAliesio
- code for accumulator multiplier
Clock_Full
- clock program on altera de2-70 board