资源列表
vote7_plus
- 七人表决器完整工程项目，VHDL语言编写，Maxplus2环境，内有仿真图，实验可用-Seven voting integrity project, VHDL language, Maxplus2 environment, there are simulation diagram, experimental available ~ ~
yiweiDCTbianhuan
- 一维DCT变换的Verilog HDL源程序，在ISE中已经通过编译，可以参考里面的文档。-One-dimensional DCT transform Verilog HDL source code, in the ISE has been through the compilation, you can refer to inside the document.
usb-blaster
- 这是使用EDA的驱动，希望对新手有所帮助，呵呵。-This is the drive using the EDA, I hope will help the novice, huh, huh.
synth_fft
- fft原代码，用vhdl语言完成快速傅立叶变换
LampsSequencer
- FPGA流水灯实验，VERILOG编写，简单的学习程序-FPGA light water experiments, VERILOG written, simple learning process
5
- 手把手教你学CPLD／FPGA设计（五）Taught you learn CPLD / FPGA Design (E-Taught you learn CPLD/FPGA Design (E)
VGAdisplay
- VHDL入门实验。256色VGA显示驱动 开发软件Quartus II 6.0 芯片EP2c8Q208-VHDL entry experiment. 256-color VGA display driver development software Quartus II 6.0 chip EP2c8Q208
VGA
- 利用VHDL语言进行嵌入式设计编程，VGA模块的程序设计-Using VHDL programming of embedded design and programming of the VGA module
shift_right
- VHDL code for generaring shift register
Nios
- nios开发教程，介绍nios软核开发的流程，适合初学者使用-nios development of tutorials to introduce the nios soft-core development process, suitable for beginners
counter_SPI
- 用verilog 写的SPI核，非常有用，附带了用它驱动数码管的例子。试试看就知道了-SPI nuclear verilog write useful, incidental example use it to drive digital tube. Try it and see
IFFT
- 这是关于傅里叶反变换的一个完整的ISE的工程..使用verilog语言-This is on the Fourier transform of a complete anti-ISE project using the verilog language ..