资源列表
led
- 8*8LED点阵的应用，8*8LED点阵-* 8LED lattice applications, 8* 8LED lattice
4544
- FPGA的同步数字复接系统设计与实现Synchronous Digital Multiplexer FPGA Design and Implementation-Synchronous Digital Multiplexer FPGA Design and Implementation
clock-for-nios
- 基于niosⅡ的数字钟设计，适用于多种FPGA的开发板，修改管脚可移植。-NiosⅡ digital clock design is based on, for a variety of FPGA development board, modify pin portable.
dmf_vhdl
- digital Matched Filter design - including the clock synchronization of the design and its implementation-digital Matched Filter design - including the clock synchronization of the design and its implementation..
AD5300
- DAC AD5300的verilog驱动,整个工程，亲测好用。-verilog code for AD5300 DAC.
LeiFPGALDPC
- this document is for the difference
adc0804
- 从ADC0804 的通道IN+输入0~5V 之间的模拟量，通过ADC0804 转换成数字量在数码管上以十进制形成显示出来。-From the ADC0804' s channel IN+ analog input between 0 ~ 5V through ADC0804 conversion to digital, digital tube to decimal form is displayed.
IFFT
- 用Verilog语言完成快速傅里叶变换的反变换-the realization of IFFT on Verilog language
CPLD-CHABU
- 基于cpld 平台，VHDL语言编写，四轴两插补控制程序。包括单轴运动、两轴插补程序、CPLD与ARM通信程序。经过工程实践应用。-Based on the CPLD platform, VHDL language, four two axis interpolation control program. Including the single axis motion, two axis interpolation procedures, CPLD and ARM communication
IFFT
- ifft 的verilog程序，最好在ISE9.2的平台上实验-ifft the verilog program, the best experimental platform in ISE9.2
GWDVPB
- 实现频率测量，脉宽测量，占空比测量，相位测量，与MSP430成功通信，频率范围在1 -10Mhz.-Frequency measurement, pulse width measurement, the duty cycle measurement, phase measurement, with the MSP430 successful communication, frequency range 1-10Mhz.
第2章_Quartus_II_使用方法
- I hope the PDF file I shared is very useful for your work. Thanks