资源列表
mips-VHDL
- 自己作业代码，应用VHDL语言实现一个多周期的简单MIPS核-AlphaJob code, the application of VHDL language more than one cycle of a simple MIPS core
GNSS
- 用altium designer画的DSP+FPGA+USB2.0的系统的原理图-With altium designer painting DSP+ FPGA+ USB2.0 schematic diagram of the system
CAR
- 基于FPGA的模拟信号灯控制，可实现交通灯的效果-FPGA analog signal control, the effect can be achieved based on the traffic lights
decoder
- It is a simple decoder created using vhdl in xilinx ise.It will helpful for beginners to create deocder using this.testbench for simulation is also created.
hssdrc_latest.tar.gz
- HSSDRC IP core is the configurable universal SDRAM controller with adaptive bank control and adaptive command pipeline. HSSDRC IP core and IP core testbench has been written on SystemVerilog and has been tested in Modelsim. HSSDRC IP core is li
div
- 近期的一些VHDL语言练习实例，包括一些简单的逻辑电路设计，运行大部分成功，可能还有一些小问题，希望各位同仁指点改正。-Some recent examples of VHDL language exercises, including some simple logic circuit design, running most of the successful, there may be some small problems, hope that colleagues pointing c
SEG_Dynamic
- 数码管显示程序，采用Verilog语言编写，在开发板上经过验证，希望对大家有所帮助-Digital display procedures, the use of Verilog language, proven in the development board, we hope to help
hanning
- 这个程序为汉明码的编码与解码，程序中有加错与纠错的环节，简单易懂-hamming coding decoding
NIOSIIbased_digitalClock
- SOPC的一个实例，已经经过验证，方便正在学习的人作为例程使用。-SOPC an instance has been proven to facilitate people who are learning to use as a routine.
digital_clock1
- 多功能数字钟 vhdl 具有报时功能-digital clock
shiboqi
- 数字示波器的完整功能的各个模块的vhdl语言-Full function digital oscilloscope modules in vhdl language
hardh264
- H.264的VHDL描述，可直接在FPGA上仿真运行，也可供学习用-VHDL descr iption of H.264. It can be run on FPGA, and also can be used for study