资源列表
Design-and-Testing-of-VTOL-UAV-Cyclocopter-with-4
- Design and Testing of VTOL UAV Cyclocopter with 4 Rotors
cpld
- CPLD VHDL 数码管程序 流水灯程序 时钟程序 -CPLD VHDL program LED lights water clock procedures procedures CPLD VHDL program LED lights process water clock procedures
DES_verilog
- 用verilog实现的DES(Data Encryption Standard数据加密标准)，把64位明文输入变为64位密文输出块。-Using DES (Data Encryption Standard Data Encryption Standard) verilog to achieve, the 64 plaintext input into 64 output ciphertext block.
Models_and_Testbenches_11_10_2004
- VerilogHDL高级数字设计书中源代码适合学习verilog编程者学习
DDRSDRAMControllerverilogcode
- 这个设计是使用Virtex-4实现DDR的控制器的，设计分为三个主要模块：Front-End FIFOs,DDR SDRAM Controller和Datapath Module。其中主要是DDR SDRAM Controller,当然还有测试模块。-This design is the use of Virtex-4 implementation of the DDR controller, the design is divided into three main modules: Fron
controler(v2.0)
- VHDL语言编的一个空调控制系统。cpld实验中的代码-VHDL language a series of air-conditioning control system. the cpld experiments code
ISE_11.1_licgen_v2.rar
- 这是赛灵思公司新出的ISE 11的破解方法，很有用的啊，详细的应用见里面的介绍啊。,This is the new Xilinx ISE 11 out of the crack method, very useful, ah, the application of detailed introduction see inside ah.
DDS_Core_Norml_ADDA_C5H
- 基于FPGA的DDS内核的信号采集和输出，是基于ALTERA公司的CycloneⅡ的EP2C5芯片，是一个很好的参考示例。-DDS core FPGA-based signal acquisition and output is based on the company s CycloneⅡ of EP2C5 ALTERA chip, is a good reference example.
2
- 一个适合新手用的VHDL实用教程！！虽然不是很全面，的但是还不错-part2
ADS2807ctrl
- ADS2807控制 FPGA板上采用TI的ADS2807高速AD芯片实现模拟信号的采集，最高速度可达50MPS,必须用FPGA进行控制。其工作时序图如下： -ADS2807 control FPGA board using TI' s ADS2807 high-speed AD chip analog signal acquisition, the maximum speed of up to 50MPS, must be controlled by FPGA. Timing di
Avt3S400A_Eval_MB_I2C_temp_v10_1_00
- xilinx fpga edk开发实例，用I2C总线控制温度传感器-xilinx fpga edk development examples, with the I2C bus control temperature sensor
ADC_VHDL2
- analog to digital converson programmed in VHDL