资源列表
attachments
- lcd .asm to show words
keypad
- 使用Verilog编写的实现FPGA键盘功能，使用了状态机-The use of FPGA in Verilog keyboard function, using the state machine
shouhuo
- 自动售货机具备投币找零功能，并用LED数码管显示金额-Coin-operated vending machines have change for function, LED digital tube display amount
motor_control
- LIBRARY IEEE USE IEEE.STD_LOGIC_1164.ALL USE IEEE.STD_LOGIC_ARITH.ALL USE IEEE.STD_LOGIC_UNSIGNED.ALL
miaobiao
- 1. 设计数码管显示的秒表。 2. 能够准确的计时并显示。 3. 开机显示00.00.00。 4. 用户可以随时清零、暂停、计时。 5. 最大记时59.59.99分钟，最小精确到0.01秒 -1. Design digital display of a stopwatch. 2. Can be accurately timed and displayed. 3. Power Show 00.00.00. 4. Users can always clear, pause, ti
divider
- FPGA除法器的使用32位的，有商和余数-FPGA using 32-bit divider, there are the quotient and remainder
ADC
- PIC实现电压检测程序，ADC精度能显示0.1电压的变化-PIC procedures for voltage detection, ADC precision voltage can show changes in 0.1
HalfFilterMatlab_11
- 半带滤波器的matlab设计 生成fpga所要的数据-halfband matlab
Filter
- 该代码主要实现环路滤波器矩阵的设计，环路滤波器的功能主要是在鉴相器的输出端衰减高频误差分量，以提高抗干扰性能；在环路跳出锁定状态时，提高环路以短期存储，并迅速恢复信号。-The code mainly realizes the design of loop filter matrix, Loop filter function is mainly in the output of the phase discriminator attenuation of high frequency erro
ddsall
- DDS的vhdl语言源程序实现 该程序可实现1HZ频率步进-DDS source VHDL language to achieve the program can be realized 1HZ frequency Step
99秒秒表
- VHDL语言，99秒秒表，已测试成功。
tb_date
- TEst bench of an increment date