资源列表
cp73001
- 在xilinx开发板下，verilgo编程的，五自由度机械臂的一组动作程序-Xilinx development board in the next, verilgo programming, a group of five degrees of freedom manipulator action program
testcordic
- catapult c cordic程序，可以转换成verilog语言，完成用modelsim进行仿真，结果可以与matlab进行比较。-catapult c cordic program
Video_ColorBar
- vhdl编写的程序,主要用来做彩条发生器,是CPLD开发的一个小例子而已,但是基础很重要嘛-vhdl programs written primarily used for color bar generator, is a small example of CPLD development only, but the basic thing is very important
watch
- 本文件为电子设计而开发的多功能数字钟VHDL语言完整源代码 --该数字钟实现的功能有时间，秒表，闹钟，年月日的显示设置等 -This document is multi-functional electronic design and development of a complete VHDL, digital clock source code- the digital clock function can be achieved time, stopwatch, alarm clo
SURS
- STABLIZER Project : STABLIZER Version : 1.0 Date : 2/6/2010 Author : H.ASADI Company : POLESTAR Graphic lcd ks108-STABLIZER Project : STABLIZER Version : 1.0 Date : 2/6/2010 Author : H.ASADI Company : POLESTAR Graphi
pci_mini_latest.tar
- PCI代码,verilog,简单的PCI设计，使用FPGA实现-PCI code, verilog, simple PCI design, FPGA implementation
uart
- 采用VHDL语言编写的串口驱动程序，已调试通过，能够实现同PC机的数据传输，可读性好，可移植性好-VHDL language using the serial driver has been debugged, to achieve the same PC, the data transmission, readable and portable
clock
- 原创：基于VHDL语言编写的电子钟。采用模块化编写，可以调整时间，采用动态扫描显示时分秒-Original: Based on the VHDL language electronic bell. Modular prepared, you can adjust the time, dynamic scanning is displayed every minute
counter_24
- quartusII 9.0 下24位计数器
DF2C8_15_DAC
- D/A 驱动程序,数模转换DAC TLC5620 -The driver of D/A.
PWM
- 在verilog开发环境下针对pwm信号的占空比的调节的编写调试！-In the development environment for verilog pwm signal duty cycle regulated write debugging!
The-ARM-SoC-design
- The ARM SoC design.rar