资源列表
booth-test-bench
- booth 乘法器的测试代码 booth testbench-booth multiplier test code booth testbench
antenna-effect
- 硬件电路设计中消除天线效应的电路RTL级Verilog代码-RTL grade of Verilog codes for reducing antenna effect
bysj
- 基于FPGA频率特性仪，随着世界新进水平发展，测试电路频率是重点-FPGA frequency characteristics of instrument，With the development of a new world advanced level, the test circuit frequency is the key
infmt
- 攒人品上传多年工作积累代码。主要功能是对视频输入信号的滤波等控制。可以综合。-Save the character to upload the accumulation of many years of working code. The main function is to control video input signal filtering. Can be integrated.
comparator
- 比较器的VHDL代码，采用行为级描述方法-VHDL for comparator
DM9000A_IPcose
- 如题：dm9000aＩＰ核，经过验证，可用
HAPF_SLAVE2
- 高压链式SVG控制用FPGA的verilog程序,其中包括SPI，16路SCI同步通讯模块程序，保护自锁功能程序，基于滞环的无功功率检测和补偿策略；还包括FPGA和DSP之间通过总线方式进行数据的快速交互等；程序完整-SVG high voltage chain of verilog FPGA control procedures, including SPI, 16 road SCI synchronous communication module procedures to protect
EE361L-Subproject0
- Testbench for the following parts found in MIPS-Parts.V
saa7113.rar
- saa7113配置，verilog语言写的 挺好的，直接可以加入,saa7113 configuration, verilog language of good and can be added directly
VHDLDATATypes
- VHDL data types enumerated types and so on
M=15generator
- 模15序列发生器，Verilog HDL语言描述，包含文件说明和波形截图-mod15 generator, Verilog HDL language descr iption , contains the file descr iption and waveform capture
VGA_rom_679104644
- VGA 利用rom的屏幕的输出代码，产生行场信号以及询问坐标-VGA screen output code to generate horizontal and vertical coordinates of the signal and reference