资源列表
fifo
- fpga中fifo的基本原理介绍了fifo的基本原理以及对fifo实现方法的阐述。-The basic principle in fpga fifo fifo introduced the basic principles and methods of implementation described fifo.
ise_11[1].3_licgen
- ise11.3的，请用来学习又没有钱的朋友使用，不要外传，谢谢！-ise11.3, please no money is used to study the use of a friend, not rumor, thank you!
smartcard_vhdl
- Readme File for Smart Card Reader File Contents ************************************************************************* This zip file contains the following files: -- VHDL Source Files in Smartcard: Top.vhd - top level file for Pic
altera-cyclone-data-sheet
- Altera结合带有软件工具的可编程逻辑技术、知识产权（IP）和技术服务，在世界范围内为14,000多个客户提供高质量的可编程解决方案。-Altera combines the programmable logic with software tools, intellectual property (IP) and technology services worldwide to more than 14,000 customers with high quality programmable
EDA-test-1
- EDA大学实验的一些代码 都可以正常运行-EDA University of experiment can be running some code
diff_io_top
- LVDS的应用的Verilog HDL例子程序，由altera公司提供。
BFSK
- 基于FPGA的二进制移频键控加密系统设计，实现二进制移频键控功能。-To achieve binary frequency shift keying
s1_led
- 本次程序通过开发板上面的4个按键控制8个LED。 一个是自己定义的控制方式,一个是符合38译码器的逻辑功能。 目录说明: 工程在\project文件夹里面 源文件和管脚分配在\rtl文件夹里面 下载文件在\download文件夹里面,.mcs为PROM模式下载文件,.bit为JTAG调试下载文件。-This program through the development board above four buttons control eight LEDs. Own de
FPGA_design_of_the_impact_factor_of_the_clock
- 影响FPGA设计中时钟因素的探讨,能帮组FPGA的设计-FPGA design of the impact factor of the clock，and can help the FPGA design
EP3C25
- Cyclone® III EP3C25的资料-Cyclone 庐 III EP3C25 information
EP3C25
- 此文档很重要，是一款最新fpga的文档，很好用的，封装业比较小，功耗低-This document is important, is the latest fpga document, useful, and packaging industry is relatively small, low power consumption
washmachine
- 源码为洗衣机控制电路的Verilog代码实现，分六个模块实现，顶层模块有原理图实现-this code is for the control_circuit of machine in Verilog ,it is divided into six modules, the top-level is schematic