资源列表
comp_sheji1
- CIC补偿滤波器的VHDL代码。通常单级的CIC阻带衰减不够，级联后阻带衰减满足要求，但是通带衰减又太大，补偿滤波器就是为了满足带内衰减要求而设计的。-THE code of CIC compensation filter.
fir
- 积分梳状滤波器(CIC)设计；,有详细的步骤-Integrator comb filter ( CIC ) design
uart16
- 一个16位的uart，可以实现串行通信，接受或者发送数据！-A 16-bit uart, serial communication can be achieved, accept or send data!
Trafficlight
- this trafffic light controller program-this is trafffic light controller program
SP_RAM_16x8_TB_solution
- SP_RAM_16x8_TB_solution SRam 16x8 test bench solution. useful for verification.
mux16
- 在该实验中就是要利用时序逻辑设计方法来设计一个16 位乘法器-In this experiment is to use sequential logic design method to design a 16-bit multiplier
N_counter_VHDL
- 任意N进制分频器的标准VHDL代码（原创）-arbitrary N divider 229 standard VHDL code (original)
segdisp
- 数码管显示有片选 模块 四输入，与其他模块相连即可使用-digital film of the election showed that four input modules, and other modules can be linked to the use of
spreadspectrum4
- these files are written in verilog but i am uploading in text format
ps2.vhd
- vhdl ps2 interface for practical use. please send me a response.
VHDL
- 能够实现控制按键功能显示的VHDL程序代码。-To achieve control of key functions display VHDL code.
addersubtractor
- adder subtractor...this source is example to build adder and subtractor code in verilog (.v)