资源列表
key
- 基于fpga的4*4键盘扫描verilog程序-du to fpga 4*4 keyscan verilog
lab014
- verilog hdl ed2 时间显示-verilog hdl ed2 time display
LED-R-G-Biic
- LED R G B三色混合调光PWM控制-LED IIC R G B communication
LCD-clock
- 单片机用液晶显示的一个时钟的C语言源程序-LCD clock with a C-language source code
flash_ctr
- 基于FPGA的verilog语言对flash的读写控制信号的实现-failed to translate
1_hello
- fpga的nios hello程序，可快速了解fpga nios核的配置方法-fpga' s nios hello program, you can quickly learn how to configure fpga nios nucleus
PN15
- 伪随机序列的产生，又称为PN码。本文件产生的为PN15，通式为X15+X14+1。-Generation of pseudo random sequences, also known as the PN code. This file is generated for the PN15, the general expression of X15+X14+1.
Bootloader
- DSP6713引导程序，可以共烧写flas，用着很方便，共大家参考。-DSP6713 boot program, may be co-programming flash, with a very convenient, a total of reference.
mygood
- 用quartus6原理编辑方式写的简易频率计我自己的实验来的 保证能使请您认真查看谢谢
ssramWR
- SSRAM CY7C1383C的读写延时控制程序-CY7C1383C delay control procedures to read and write
tt
- codes regarding VHDL counter and LCD display.
sram_verilog
- verilog 源代码，非常简单的一种SRAM的可综合的写法，适合新手学习之用。-verilog source code，simply implementation of SRAM with synthesisable coding-sytle， special for the beginners.