资源列表
FIR
- FIR数字滤波器分布式算法的原理及FPGA实现
VCP201_CODE
- VCP201_CODE is a FPGA source code.
usb_HLD3Core(400)_(B)
- 接ADDA 板卡，外接信号源（峰峰值最大为1V），运行PC 端程序可 以将输入的信号源波形在PC 上显示出来，完成USB 的数据采集功能。-access ADDA Card, external signal source (peak to peak largest 1V), PC-operating procedures can be the source of the input signal waveform displayed on the PC, and complete USB d
LCD1
- 用Verilog HDL编写的16*2液晶显示one world,one dream。压缩包中包括所有文件，使用的芯片为EP2C5T144，经过最后下载测试的。-Verilog HDL prepared with 16* 2 LCD display one world, one dream. Compression package, including all documents, use the chips for EP2C5T144, download final test.
Xlinx_CAM
- Xilinx提供的CAM文档，包含设计小规模的CAM的Verilog源代码，以及相应的说明文档。xapp201为综述性文档。-Xilinx provides the CAM documentation, including design of small-scale CAM, Verilog source code, and the corresponding documentation. xapp201 review of the document.
185ed961-7850-4548-8157-bffde377e11d
- 这是基于fpga的led灯的点灯实验，可以作为fpga的入门实验，实验重点在于对595芯片的驱动的编写-This is based on fpga' s experiments led lights lighting can be used as entry fpga The experiment focuses on the preparation of 595 chip driver
verilog
- Verilog 中文教學 1.簡介 2. Verilog 的模型 3. Verilog 的架構 4. MAX+plus II 的 環境 5. 基本資料型態 6. 輸出入埠的宣告 7. 邏輯閘階層模型的敘述 8. 資料流模型的敘述 9. 行為模型的敘述 10. 編譯命令 11. 循序邏輯電路範例
uart-project
- uart verilog zzpoifeow fwpoep wf wpo fpw pdfikwpoe e opfewiepfow [efkpow f pkw[fpkdw[kef[w fkepowkf[ok[ew f[pekwp fpoefi[wie-UART verilog
my_232
- verilog 232串口收发程序 在开发板上测试成功过-verilog 232 serial port transceiver program already had some success in the development of on-board test ^ ^
eetop.cn_16bits_multiplier
- 16位并行乘法器源代码，booth2编码，二进制树拓扑结构-16bits parallel multiplier source code
25LC512
- 25LC512 512K-BIT SPI SERIAL EEPROM (VCC = +2.5V TO +5.5V) 的模型和文档。-25LC512 512K-BIT SPI SERIAL EEPROM (VCC =+2.5V TO+5.5V) behavioral model and datasheet.
CY7C68013.rar
- USB2.0的Verilog实现，含有完整的FPGA代码,Use Verilog to implement the USB2.0 protcol