资源列表
LCD_NIAN1
- 1602显示汉字“年月日”，对应的时间需要自己改一下-1602 show the Chinese character for " date" , corresponding to the time of need to change
lab_3
- Verlog HDL实现m序列检测“1010”，如果有，则输出一个高电平-The m sequence detection, " 1010" Verlog HDL, if there is a high output
i2c
- I2C总线协议的verilog 可直接应用 -I2C bus protocol verilog can be applied directly
somethingaboutADC0809
- 8.4 ADC0809接口电路及程序设计 ADC0808/ADC0809资料； 基于VerilogHDL的ADC0809采样控制器设计； 基于VHDL语言的A_D采样控制器设计。 -8.4 ADC0809 interface circuit and program design ADC0808/ADC0809 information ADC0809 based on the sampling VerilogHDL controller design A_D languag
8bitmultiplexer
- Simple eight bit multiplexer using VHDL.
SPI_Master_module
- 利用VHDL语言编写的SPI主机模块，采用内部自环回已经经过测试，发送接收数据正常，里面有modelsim工程，可以验证下仿真波形-SPI host module using VHDL language, has passed internal self-loopback test, sending and receiving data normally modelsim project, which can be verified under simulation waveforms
Mentorkg_2010
- Modelsim 6.6 破解，Windows & Linux通用-Modelsim 6.6 crack, can be used for Windows/Linux edition.
eetop.cn_quartus_ii_11.0_sp1_patched_sys_cpt_dll.
- dll for quartus ii 11.0 windows
FpgaFskMod
- 基于verilog的2FSK调制程序，simulink仿真通过(2FSK modulation program based on Verilog, Simulink simulation passed)
keyboard_verilog
- 实现键盘发送字段功能，当键盘按下一个按键后FPGA通过解码做出相应响应。然后转换为显示码。-Sent field of keyboard functions when you press a keyboard key FPGA responds accordingly by decoding. Then converted to display code.
ee
- SDRAM的描述说明，讲解关于SDRAM基础知识，及使用SDRAM 的时序图-SDRAM descr iption descr iption, explain the basics of SDRAM, and the use of SDRAM timing diagram
VLSI-Architectures-for-Discrete-Wavelet-Transform
- VLSI architecture and VHDL codes for 1D and 2D DWT and IDWT schemes.