资源列表
verilog
- Verilog初学者例程:1位全加器行为级设计、1位全加器门级设计、4位超前进位加法器、8位bcd十进制加法器、8位逐次进位加法器、16位超前进位加法器、16位级联加法器、多路四选一门级设计、七段译码器门级设计-Verilog routines for beginners: a behavioral-level design full adder, a full adder gate-level design, 4-ahead adder, decimal 8-bit bcd adder, 8-
Verilog
- Verilog经典教程，供各位学习哈。很经典的哈。-Classic Verilog tutorials for you to learn Kazakh.
veriloghdl
- verilog语言书籍 夏宇闻的 十分经典 pdf 清晰版-verilog language books pdf Yu Xia Wen a very clear version of the classic
Verilog
- 夏宇闻-Verilog经典教程，学习Verilog入门必看-Xia Yu Wen-Verilog classic guide to learn Verilog entry must see
Verilog
- 初学FPGA的人学习很有用，学习Verilog的基础。-Beginners to learn the FPGA is useful, the basis for learning Verilog.
Verilog
- 夏宇闻-Verilog经典教程，对想要学习Verilog的人提供帮助-Xia Wen-Verilog Classic Guide for those who want to learn Verilog help
夏宇闻-Verilog经典教程
- verilog经典教程，对于新手有很大的帮助(Verilog classic tutorials, a great help for beginners)
夏宇闻-Verilog经典教程
- 夏宇闻-Verilog经典教程。电子版。很好的入门书籍。(Xia Yu -Verilog classic tutorial. Electronic.Good introductory books.)
divider
- 基于移位相减运算的除法器设计，完整的设计工程文件在divider文件夹下-Based on the shift subtraction divider design, complete design project file divider file folder
ADPCM
- APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境-APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment
99000
- VerilogHDL课件 学习的好资料 可以参考-VerilogHDL Courseware good information can refer to
Verilog--classic
- verilog 的经典教程，包含基本命令定义等内容并且由实例讲解了具体的编程方法和设计思想-Verilog classic tutorials, include basic commands the content such as defined by example and explain the specific programming method and design thought