资源列表
CME3000FPGADevelopment-
- 针对京微雅阁的CME300 FPGA教程，里面有几个例程，并附有源代码，初学者可尽快入门。-For Beijing micro Accord CME300 FPGA tutorial, there are a few routines, with source code, beginners can start as soon as possible.
shuzi.rar
- 数字电子钟设计，整点报时，时分秒分模块设计，另附实验报告和实验结果，内容详细不容错过,The design of digital electronic clock, the whole point of time when minutes and seconds sub-module design, an additional test reports and laboratory test results, the details not to be missed
Stepper-motor-drive-control
- 1. 了解步进电机的工作原理。 2. 掌握用FPGA产生驱动步进电机的时序。 3. 掌握用FPGA来控制步进电机转动的整个过程。 -1 understand stepper motor works. 2 master drive a stepper motor using FPGA generates the timing. 3 master use FPGA to control the stepper motor rotates the entire process.
uart_tx_rx
- 该工程用verilog编写，已通过串口调试助手调试通过，接收模块采用8倍波特率采样数据，有较好的滤波功能，在PC上完成自发自收功能。-Verilog prepared by the project, has passed through the serial debug debugging assistant, receiving 8 times the baud rate module sampling data, a better filtering in the PC to complet
fangbo
- 一个可切换分频的时钟分频器的verilog语言，可根据具体情况修改参数实现不同的分频-A switchable clock divider divider verilog language, modify the parameters according to the specific circumstances of different sub-frequency
Perfect-VHDL
- 1 步进电机定位控制系统VHDL程序与仿真 2 采用等精度测频原理的频率计程序与仿真 3 URAT VHDL程序与仿真 4 自动售货机VHDL程序与仿真 5 电子琴程序设计与仿真 6 出租车计价器VHDL程序与仿真 7 DAC0832 接口电路程序 8 FSK调制与解调VHDL程序及仿真 -1stepper motor positioning control system for VHDL procedures and simulation
20130607UART
- 读取温度传感器DS18B20数据并通过串口发送到上位机。程序开发是基于altera 的EP2C8Q208芯片。-Read the temperature sensor DS18B20 data and sent it to the host computer via the serial port. The program development is based on the the altera s cyclone II device :EP2C8Q208.
Comprehensive-design-report
- 多功能抢答器综合设计报告，报告中记录了各模块的原理，代码，功能等。可作为参考，开发工具为Quartus，VHDL语言。-Multifunction Responder comprehensive design report, which records the principle of each module, code, function and so on. Can be used as reference, development tools for Quartus, VHDL langu
Verilog
- 一本很好的学习FPGA的资料，主要讲verilog语言。-A good learning FPGA information, mainly about verilog language.
Verilog_Designing
- Verilog设计教程（夏宇闻）。 北京航空航天大学经典教程。-Verilog Designing (Xia Yuwen). A classical book of Beijing University of Aeronautics and Astronautics.
Verilog
- 非常实用的教程，简单易懂，适合新手使用。-Very useful tutorial, easy to understand for novice users.
Chinese_version_of_Verilog_notes
- Chinese version of Verilog notesVerilog讲义中文版-Chinese version of Verilog notesVerilog handout Chinese