资源列表
div7
- VERILOG代码 七分频电路设计通用分频器值得一看-DIV7 circle
HDB3
- HDB3编解码过程，本代码用vhdl语言书写，重现了HDB3编解码的详细过程。相信对广大写硬件语言的朋友有好处-HDB3 code and decode
uart_tx_2
- VHDL Code for UART Transmitter
CM
- Verilog Implementation of Complex Mutliplier
xuanpin
- 用两个按键分别控制占空比的频率和占空比 8中频率 和四种占空比可调 可自己叫消抖，上机可用-Two buttons control the duty cycle frequency and duty cycle 8 adjustable frequency and duty cycle of four kinds can call themselves debounced on board available
vga_gen_46
- Verilog Vga Generator
增量式光电编码器计数器 Verilog 程序
- 增量式光电编码器计数器 Verilog 的程序,附源 Verilog 的代码.
miaobiao
- 一个精确的到0.01s的时钟源程序，对于初学VHDL理解很有帮助，只给了源程序没有给出仿真波形-An accurate clock source to the 0.01s for the beginner to understand VHDL helpful not only to the simulation waveform of the source
cla20_n
- Verilog 20 bit的累加器 采用流水香设计，用5级4bit的超前进位加法器-Verilog 20 bit accumulator using water in Hong design, with five 4bit the look-ahead adder
i2cSlave
- i2c communication slave module
KEYBOARD_DEC-vhdl
- maxplus2为开发环境 vhdl编写的 键盘 程序-maxplus2 VHDL development environment for the preparation of the keyboard procedures
DATA_16QAM_MAP
- qam星座映射也qam调制的硬件实现代码详解。用于OFDM下行链路-qam qam modulation constellation is also the hardware implementation code Xiangjie. For OFDM Downlink