资源列表
scan_led
- 八位动态数码管显示 在试验箱上已经实验通过-Dynamic eight digital display
verilog_uart_log_vhdl_uart_log
- verilog uart mode code VHDL uart mode -verilog uart mode code VHDL uart mode code VHDL uart mode
src
- FT245 driver for Xinix spartan3A. to enable USB1.1 function for Microblaze design-FT245 driver for Xinix spartan3A. to enable USB1.1 function for Microblaze design
VGAsignal
- Verilog 典型的VGA 显示 有按键控制的不同彩色的图像-Verilog VGA display
rec
- 基于vhdl编写的FPGA与PC串行通信的接收信号解码程序，调试已通过。-Vhdl prepared based on FPGA and PC serial communication received signal decoding process, debugging has been passed.
coder_counter
- 增量式光电编码器计数器的FPGA实现程序,verilog3段式FSM,异步加载.-Incremental Optical Encoder counter program FPGA implementation, verilog3 struts FSM, asynchronous load.
CIC_DEC_3
- CIC抽取滤波器设计，CIC滤波器采用5阶3倍抽取。-CIC decimation filter design, CIC filter order 3 times 5 samples.
CIC_DEC_6
- CIC抽取滤波器设计，CIC滤波器采用5阶6倍抽取。-CIC decimation filter design, CIC filter stage 6 times 5 samples.
traffic-light
- 使用verilog实现的简单交通灯控制程序，只是实现的红绿黄灯定时。-traffic light control circuit。however,just including red,green,yellow light
counter
- 实现可控计数器，在用户的控制下，可以实现起点和终点的计数设置-used to count by the user controlling
Add_Sub_4_Bit
- 这个是vhdl中很简单并且很基础的adder减法编码 主要是为以后的学习ram编码做准备 其中包括fulladder和halfadder-This is a very simple and very vhdl based adder coding is mainly for future learning ram preparation including fulladder coding and halfadder
IIC
- Verilog IIC程序，RAM接口，方便调试，一主多从-Verilog IIC program, RAM interface, easy to debug, and more a master