资源列表
firlms
- 基于FPGA的自适应FIR滤波器的verilog设计与实现-Adaptive FIR Filter Based FPGA Design and Implementation of verilog
Stepper-motor-controller
- 步进电机控制器 (VHDL语言编写)亲自尝试可运行-Stepper motor controller VHDL language
LCD1602
- 4数据线的LCD1602，即只需4根数据线就可完成读写LCD1602-4 data lines LCD1602, which only four data lines can be completed literacy LCD1602
LTC1407
- 针对ADC器件LTC1407的时序编写的Verilog程序，经过实际测试成功，简单实用-According to the timing of ADC device LTC1407, Verilog program, after the actual test success, simple and practical
ADDER
- 经过精心设计的加法器的代码，并在FPGA硬件平台实现和验证过的
flowingled_top
- 8位流水灯，1个LED灯左右来回循环。2个LED灯左右来回循环-About eight water lights, an LED light back and forth cycle. Cycle back and forth about 2 LED lights
c20_cordic_computer
- 精通verilog HDL语言编程源码之6--CORDIC数字计算机的设计-Proficient in language programming verilog HDL source of 6- CORDIC digital computer design
dotmatrix
- MAXplus 2 课程设计 点阵的动态显示-A programme of VHDL developed in MAXplus 2 to display one s name in a shifting way.
shumaguanxianshi
- vhdl语言实现的数码管显示控制程序段，可实现数码管的扫描显示-It is a displayer control sequence using VHDL language
LampsSequencer
- FPGA开发，ALTERA的EP2C5实验平台，制作流水灯程序VHDL-FPGA
verilog_uart_log_vhdl_uart_logfdj
- code VHDL uart mode -code VHDL uart mode code VHDL uart mode
ADV7125
- ADV7125在FPGA上的驱动程序，为用户提供ADV7125的控制接口-ADV7125 driver on the FPGA, to provide users with the control interface ADV7125