资源列表
oc_i2c_master_v92
- I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
vga
- a code to display in VGA using VHDL lang
anti_tb
- VHDL - SUMATOR CU GENERARE TRANSP
DisplayCtrl
- LED显示，有需要的可以下载，可以实时读写数据，很方便-LED display, there is a need can be downloaded, read and write data in real time, it is convenient
qicehweideng
- 汽车尾灯控制电路的设计，正常行驶时，6个尾灯全灭，刹车时，尾灯按一定频率闪烁，左转时，左侧灯轮流闪烁，右转时，右侧的灯轮流闪烁。-Control circuit design taillights, normal driving, six taillights Quanmie, brake, tail lights flashing at a certain frequency, turn left, turn left flashing lights, turn right, the righ
Verilog-Code-Receiver
- Verilog Code for Receiver USART
alphabeta_transform
- alpha beta transformation, for FPGA synthesis and implementation
SPI_Slave
- SPI Slave example (VERILOG HDL)
899207KEYBOARD_DEC-vhdl
- 数字平律己的设计非常实用 黄永显示早设计大方ijasd-The design of digital self-Ping Wong Wing-show as early as practical design Dafang ijasd
adc0809
- PFGA控制adc0809的vhdl源码-PFGA control adc0809 the vhdl source code
New-folder
- this code will help to design fir filter
mac
- verilog 实现乘累加器 源代码 以及测试代码 mac.v mac_tb.v-verilog Achieved by the source code and test code accumulator mac.v mac_tb.v