资源列表
buzzer
- 蜂鸣器程序，向蜂鸣器发送一定频率的方波可以使蜂鸣器发出相应的音调-Buzzer program：
encode
- 实现用FPGA控制编码芯片AHA4013的编码
mem
- This my version of a memory module that can be used in a digital device to store the filter coefficients.-This is my version of a memory module that can be used in a digital device to store the filter coefficients.
serial
- 串行口数据传输实验，vhdl源代码，完成信号发生，串并转换，检测电路
vhdl
- 包括一个8位D触发器、一个jk触发器、一个10的计数器。适合初学者和开发人员-Including an 8-bit D flip-flop, a jk flip-flop, a 10-counter. Suitable for beginners and developers
Interface
- 基于FPGA环境下ISA总线模块程序实现，已通过调试-FPGA-based ISA bus module environment program implementation, has passed the commissioning
keyboard
- verilog实现键盘驱动功能，具备基本字母按键输入，大小写转换功能，通过串口与主机实现交互-verilog to achieve keyboard-driven features, basic letter keys input, case conversion functions, interact with the host computer through the serial port
vhdl
- VHDL是一门很好的硬件描述语言。它有很多功能和语句。-VHDL is a very good hardware descr iption language. It has a lot of functions and statements.
7_1LVDS_serilizer
- 7:1LVDS编码 为LVDS方面需求的人提供参考设计，很高兴- This VHDL or Verilog source code is intended as a design reference which illustrates how these types of functions can be implemented. It is the user s responsibility to verify their design for consistency a
uart_tx
- FPGA用于串口通信的发送程序，用于跟计算机以及各FPGA通信间的通信-transmit process of serial communication in FPGA, to communicate with computer and the other FPGA
clockbuffer
- Code for debouncing push buttons
shift_split_data
- 关于一个串行数据输入 根据时序将数据分两路输出的程序 -on a serial data input timing will be based on output data using two procedures