资源列表
flash_if_top
- VHDL编写的NOR FLASH控制器，在开发板上验证通过-NOR FLASH controller written in VHDL, verified by the development board
txd_interface
- 串口发送接口控制联合uart_txd_contrl实现-uart TXD Verilog
sale2
- sale，自动收获机。首先投币，然后买东西，然后退币-sale, automatic harvester. The first coin, and then buy something, and then coin
KEY12
- １３键键盘的ＶＨＤＬ顶层文件，我是初学着，希望对初学者有用-13 key keyboard VHDL top-level document, I was a novice with the hope that useful for beginners
syn_fifo
- 同步FIFO的verilog编码 -synchronous FIFO verilog coding synchronous FIFO verilog Synchronous Code FI FOR the verilog coding synchronous FIFO verilog coding
232_transmitter
- Rs232 tramslator usage
Lab3
- A simple example of an isr for the Nios -A simple example of an isr for the Nios II
lcd_16207
- 基于sopc ep2c5开发板的液晶字符显示例程-Sopc ep2c5 development board based on liquid crystal character display routine
Clock_generator
- Verilog source code for a clock generator
parite
- decode VHDL parite You can decode a parite on x bytes
time
- 这是eda时钟，代码，课程设计用。实验。-It is eda time programe.
lab2parte1
- We want to show the values set through the switches SW8-1 on the 7-segment display and HEX0 Hex1. Values are denoted SW4 and SW8-5-one, shown in Hex1 and diplays HEX0, respectively. Your circuit must be able to show the digits 0