资源列表
prbs
- verilog 格式的prbs数据。可以用于对发射机和接收机的误码率的测试-verilog format prbs data. Can be used for the testing of the transmitter and receiver BER
led
- LED呼吸灯硬件编程语言 Verilog 实现占空比变化LED灯缓慢点亮和熄灭的效果-LED Breathe
div_aegp
- 用VHDL语言实现的除法器，可以处理非整除运算。精度0.004
dmx512
- DMX512接收程序C源代码，DMX512接收程序-C source code of the receiving program DMX512, DMX512 receiving program
SYNC_FIFO
- its simple fifo.which is used to first in first out for vhdl source code
max2_test
- MAX2 EPLD 的测试程序, VHDL语言编写.-MAX2 EPLD testing code, VHDL language.
pngpang(2)
- 用vhdl语言使用ise开发工具模拟两人乒乓球游戏，实现状态转换。-Ise vhdl language with development tools using two table tennis simulation game, to achieve the state transition.
63bit1amount
- 求63位二进制数前导1个数Verilog-Solution for 63bit-FL1. Writen with Verilog.
2-to-4-Decoder-with--Configuration
- 2-to-4 Decoder with Testbench and Configuration This set of design units illustrates several features of the VHDL language including: Using generics to pass time delay values to design entities. Design hierarchy using instantiated components.
AD5668_verilog
- AD5668 的spi控制,使用verilog编写-control AD56668 using verilog
FLOATING-BUFFER
- Floating Buffer verilog code for NOC design used for dynamic reconfiguration.
Diver_clk
- 时钟分频,可以实现2分频，4分频，到8、16分频 11分频等。都可以在源代码中通过少量的修改来实现。-clock divider