资源列表
03_strcture_3
- VHDL的结构2，也是和前面传的那个来源于一个老师，可以说是老师的心得哦-VHDL structure of 2, and in front of Chuan is also derived from a teacher that can be said to be the teacher s experience oh
VHDL-8259
- 用VHDL语言 实现8259A中断芯片的功能-VHDL language with the 8259A interrupt the function of the chip
switch_9
- 使用systemverilog语言写的4端*换机，你可以学习使用systemverilog-use systemverilog write 4 port switch,you can learing systemverilog language
uvm_switch_8
- 使用uvm验证环境搭建的testbench，主要验证switch的功能。可以学习uvm的简单功能-use uvm set up testbench ,the mainly focuse is verification swtich,you can learning uvm sample fucntion
ovm_switch_8
- 使用OVM验证了一个4端口的交换机，其中包括主要的组件，可以学习一下-use ovm language verification switch of 4 port,it include main ovm_component,so you can learning
???
- This is timer code using VHDL
一种arm7源码（Verilog）
- 一种arm7源码（verilog），arm7结构比较老了，不过用来初学还是不错的(A kind of ARM7 source code (Verilog))
ug901-vivado-synthesis-examples
- verilog edge detector codee, for vibado tollssssss
project_FSM
- Finite State Machine in VHDL
DIV_PWM
- 这是简单的vhdl pwm的例程，适合新手学习-This is a simple vhdl pwm routines, suitable for beginners to learn
adio_encoser_and_decoder.zip
- digital audio conversion logic,digital audio conversion logic
CAN_IPCore
- CAN_IPCore CAN协议的IP核源代码 verilog 语言