资源列表
mult
- 64位乘法器源码verilog,经过验证测试
m511new
- 扩频通信M511序列,编码,通用VHDL语言,用于相关-M511 sequence spread spectrum communication, coding, generic VHDL, for related
fft fpga
- please copy this file very very good source code!!!!
VGA.3DS-Proteus-ARES
- 3D Model to Proteus/ARES 3D PCB Visualization
add_sub_lab2
- 实验课的作业，包括半加器、全加器、加/减法器，使用逻辑图和VHDl描述，包括分析和报告。-experiment include the operation of a half adder, full adder, plus / subtraction device, and the use of logic diagram VHDl descr iption, including analysis and reporting.
model3
- promodel交通灯仿真模型 实现交通灯智能控制 紧急情况-promodel trafficlight
verilog-testbench-preliminary
- 硬件描述语言verilog的testbench的写作方法-the writing method of the testbench of verilog
testbench_P_verilog
- 怎样编写testbench verilog-how to write testbench verilog
SSDT
- 同步串行数据发送电路，并行数据输入，串行数据输出。-Synchronous serial data transmission circuit, parallel data input, serial data output.
verilog1
- 各种verilog学习资料 希望对你有帮助-Learning materials of various verilog want to help you
145170
- 51单片机控制mc145170的写寄存器，从而使锁相环能够正常工作-51 single-chip control mc145170 write registers, so that phase-locked loop to work properly
FFT_64
- 自己写的一个64点的FFT，在ISE上测试并做了仿真。-They write a 64-point FFT, the ISE test and do the simulation.