资源列表
serial_verilog1
- 基于verilog hdl 的series 串口通信实现源码-Verilog hdl-based serial communication to achieve the series source
DE2_70_TOP
- 用于DE2_70开发使用,还是不错的。希望对大家有用-use for developing of DE2_70
44vhdl
- 44个vhdl实例 注1： 含有不可综合语句，请自行修改 注2： 一些PLD只允许I/O口对外三态，不支持内部三态，使用时要注意 注3: 设计RAM的最好方法是利用器件厂家提供的软件自动生成RAM元件，并在VHDL程序中例化-44 VHDL examples Note 1 : Includes an integrated statement, the initiative to revise Note 2 : Some PLD only allows I / O exte
flash
- 主要实现W25系列 FLASH的读写控制硬件程序，有完整的测试程序，并在工业上已经得到应用。希望对正在做这方面的工作的人有所帮助-Main achieved W25 series of FLASH program to read and write control hardware, a complete test program, and has been applied in industry. Want to do this work are those who help
QAM16_demo
- This a demonstration for 16QAM. It is a Simulink model, including hardware implementation on Xilinx FPGA for adaptive equalizer and carrier recovery. -This is a demonstration for 16QAM. It is a Simulink model, including hardware implementation on Xil
RSACypher
- FUITFULL FOR RSA ALGORITM IN VHDL
news5f
- Verilog HDL语言编写的5分频电路。采用两路时钟相逻辑作用产生。-Verilog HDL prepared by the five-frequency circuits. Clock using two phase logic role.
Quartus_vhdl
- 用QUARTUS编译通过的等精度频率计，我错误，但有几个警告（不影响设计）。我的毕业设计啊！！！ -QUARTUS used by the compiler, and other precision frequency, I am wrong. But there are several warning (not affect design). I graduated from the design ah! ! !
BuildingtheCPUdatapath
- Building the CPU datapath
EP1C3T144_FPGA_develop_board_manual
- 这是我的FPGA的板子，用以产生任意波形
VHDLexample49
- VHDL的49个例子，例子丰富，有计数器、状态机、寄存器、汉明纠错码编码器、游戏程序-VHDL 49 examples, examples of rich, counters, state machines, register, Hamming ECC encoder, Games, etc.