资源列表
dds1
- dds输出一个正弦波，通过修改频率控制字来控制频率(DDS outputs a sine wave to control frequency by modifying the frequency control word)
16QAM
- 可以实现随机序列和16QAM的仿真，verilog语言编程，modelsim和QUARTUS联合仿真(It can realize the simulation of random sequence and 16QAM, Verilog language programming, Modelsim and QUARTUS co simulation.)
ADC_Noise_021804
- ADC noise analysis tutorial for microchip micro controllers
UltraCTR
- ULTRACTR的源码，xps工程实现，基于PPC平台-ULTRACTR source code, xps engineering, based on the PPC platform
proj-ASC
- simple microprocessor that gives the greatest common divisor of 2 (4bit) numbers
EX2
- nios ii 嵌入式 实现数码管（按键切换）、LCD时间显示-nios ii embedded digital control implementation (key switch), LCD time display
SI4432_RX_192
- 基于FPGA的SI4432无线透传模块的VERILOG工程，测试可用(接收端工程文件)，使用Quartus II 可以直接打开。 -FPGA-based wireless passthrough module SI4432 VERILOG engineering, testing available
Helps
- Help materials on VHDL development
SDI
- SDI显示模块，亲测，能够显示8*Block的黑白渐变图像，分片率1920*1080P/30F-SDI display module, pro-test, can display 8* Block black and white gradient image, fragmentation rate of 1920* 1080P/30F
Avt3S400A_Eval_MicroBlaze_v10_1_03
- Creating Your First MicroBlaze Design with the Spartan-3A Evaluation Kit This tutorial shows how to make use of XPS, BSB, and an XBD file to create and use a MicroBlaze soft processor system for the Avnet Spartan-3A Evaluation Kit.
dds
- 32位流水线思想，任意频率任意波形信号发生器-32 pipeline thinking at any frequency arbitrary waveform signal generator
freq_detect
- verilog写的数字频率计，用七段数码管显示-verilog to write the digital frequency meter