资源列表
Lab5.5_Led_FPGA
- 流水灯的详细代码，并且在开发板上运行通过-Light water detailed code, and run through the development board
MSP430F449_uart
- MSP430F449 UART 232 操作程序-MSP430F449 UART 232 操作程序
uart_latest.tar
- VERILOG串口IP核，在XC2S200E测试过-UART IP CORE
uart_latest.tar
- 串行UART开源的核心。该设计是专为使用作为一个独立的芯片或用于与其他我们芯的使用。其原因显影串行UART核的事实，即异步串行通信是很常见的，几乎每一个机器理解it.Also，为OCRP-1，我们需要的通信的方式与主计算机，以使它可通过网。-serial UART open source core. The design is engineered for use as a stand alone chip or for use with other of our cores. The reas
uart_latest.tar
- OpenCores UART uart16550_latest.tar.gz
choose
- 8-3多路选择器的fpga实现，数码管显示当前选择数据编号-8-3 multiplexer fpga realize, digital tube display the currently selected data Numbers
floating-point-adder1
- 基于VHDL语言的32位单精度的浮点加法器-floating point adder based on VHDL
TestFixture
- I2C 控制器的 Verilog测试程序，包括时钟、I2C测试文件-I2C controller Verilog test procedures, including the clock, I2C test file
led
- 控制4盏灯从左到右依次点亮循环，这是基于系统驱动的开发，可用于嵌入式系统的学习-Control 4 lamps were lit left to right cycle
PWM
- 用按钮控制PWM占空比，两个按钮调大调小，每次按键改变占空比1 。-Use the button to control the PWM duty cycle, two button adjusted, each button changes the duty cycle 1 .
module-i2c
- I2C MASTER CODE FOR VERILOG AND FGPA IMPLEMENTATION.I WILL SUPPLY FULL CODE IF NE-I2C MASTER CODE FOR VERILOG AND FGPA IMPLEMENTATION.I WILL SUPPLY FULL CODE IF NEEDED
8fenpin-verilog
- 用verilog HDL实现8分频，可作为时钟8分频器-Verilog divide by 8 to achieve