资源列表
Digital-Signal-Processing_Written-Assignments.doc
- digital signal proccessing dft fft
Quartus_Clock
- 利用Quartus模块化层次化设计数字钟-Using Quartus hierarchical modular design digital clock
risc
- RISC（reduced instruction setcomputer，精简指令集计算机）是一种执行较少类型计算机指令的微处理器。改源码是vhdl语言，能在FPGA上跑。-RISC [reduced instruction setcomputer, Reduced Instruction Set Computer] is an implementation of fewer types of computer instructions to the microprocessor. VHDL s
tlc549adc
- 本程序是用Verilog HDL 状态机编写的tlc549的驱动程序-This procedure is used to write Verilog HDL state machine driver tlc549
manchester-Xinlinx
- verilog代码： 基于cpld的machester编译码器-verilog code: cpld of machester based codec
FPGA_UART
- FPGA串口实现。 发送和接受数据功能代码-FPGA serial interface. Send and receive data function code
lcd_verilog
- Lcd的verilog HDL 语言的接口电路的语言描述，简洁实用-Lcd' s verilog HDL language interface circuit descr iption language, simple and practical
AltrFir32
- 借助于altera公司的IP核，在FPGA中使用dspbuilder实现32位低通FIR滤波器功能，-Altera With the company
mouse
- Mouse using vhdl language
PNgenerator
- This is a simple example of PNgenerator which use the clock signal inside the NEXYS3 board.This is basically a 8-bit PN number added by 256. The initial value cannot be all zeroes.
sdram_controller
- SDRAM 控制器的 verilog 源代码, 针对Micron 的SDRAMS设计,支持全部的指令, 已经经过逻辑验证,并实际用在芯片设计中,作为一个模块,正常工作.-SDRAM controller verilog source code, for Micron' s SDRAMS designed to support all of the instructions, the logic has been verified, and actually used in chip des
CAN总线verilog控制器-MCP2515
- MCP2515的FPGA驱动代码，收发均可，测试通过