资源列表
moma_wid_RISC
- Nice one,very very enjoying
up-down-counter
- up down counter by verilog
Projects-Suggested-for-FPGA-ASIC
- FPGA - ASIC file document
ADD
- 基于FPGA自带IP核建立的加法器，希望对大家有帮助！-FPGA-based IP core comes with the establishment of the adder, we want to help!
61580PCHZ
- 芯片61580的中文文档，对芯片的原理进行了详细的阐述-Chip 61580 of the Chinese documents, the principle of the chip described in detail
washer
- 洗衣机洗涤控制电路设计实例程序，包括洗衣机洗涤控制电路的性能要求，-washer
FSM-_brief_version
- 非常有用的状态机及其FPGA程序设计。lattice-Very useful state machine and its FPGA programming
pptest
- 用VHDL编写的基于FPGA的乒乓球游戏，可以在de2实验板上直接运行-Prepared using VHDL-based FPGA' s table tennis game, you can run directly on de2 board experiment
Xil3S500E_revD_emac
- spartan 3e开发板中实现以太网通讯-spartan 3e development board Ethernet communications
2fsk_final
- 全数字fsk调制解调的实现 verilog源码-All-digital realization of fsk modem verilog source code
DAC8812
- DA转换，Verilog HDL 编的，可实现DA转化。DA芯片用的是DAC8812，实现16位数模转化。-DA conversion, Verilog HDL code, the DA conversion can be achieved. DA-chip using a DAC8812, 16-bit analog-to achieve transformation.
DE2_LCM_CCD_onchip.7z.RAR
- 將DE2連接到LCD版面上 內為友晶客科技公司所附製的程式碼-DE2 will connect to the LCD layout for Terasic off technology companies attached to the system code